ATSR is closely related to the familiar ADSR, and on the surface, it plays like a fully voltage controllable envelope generator.
The difference in name belies the difference in functionality. In a traditional analog ADSR, the output decays from a higher attack voltage to a lower, but still positive, sustain voltage. ATSR can traverse a slope from any attack voltage to any sustain voltage within the operating range of -10V to 10V.
The module has fully analog attack and sustain level inputs which can vary continuously without changing the slope times.
This unlocks the potential to use the level inputs as internal VCAs, with the slopes mapped onto the amplitude of the level inputs at the output. A wide bandwidth at the level inputs allows you to use CV or audio, creating a useful node in your audio or modulation signal flow.
With a different patching approach, optional sample and hold functionality generates envelopes with random levels and slope times using a single noise source.
A set of logic outputs can be used to cascade other signals or impose looping behavior when self patching.
If you haven't yet, take a glance at this introduction of Via's controls, IO, and user interface.
Each knob controls the time of the respective stage. With no CV connected, the minimum time is 3ms (counterclockwise) and the maximum time is about 4 seconds (clockwise).
Note that the stage time does not change with the distance traveled, a unique feature rarely found in traditional envelope generators
The CV inputs also provide control over slope time. Slope time increases with input voltage.
The GATE input is the primary input on the module. It behaves as you would expect from an analog ADSR.
A rising edge at the RETRIG input while GATE is high and after attack is complete will initiate a new attack release cycle.
OUT is the output from the ATSR envelope.
LOOP is a gate output that goes high when the release stage is complete and low when T stage has completed.
SEG is high during the stage selected by the corresponding parameter.
DELAY is a copy of the gate output delayed by the sum of the A and T stage time. A retrigger event is passed into the gate delay as a momentary off-on event.
The A and S level inputs are actually scaled and mixed under the hood to compose the envelope, so much of the display is dedicated to showing the amount of attenuation on each input at the output. The blue and red tints of the triangle indicate the scale of the A and S inputs at the output respectively.
When the level sample and holds are disabled, the white LEDs on the left mirror the red and blue indicators, with a copper trace connecting each LED to the associated level input. When the sample and holds are enabled, they are dark through the envelope.
The LEDs on the right indicate the state of the connected gate outputs.
Each of the time controls is connected to a sensor with a silkscreen indicator. Tap the sensor to select between (1) exponential, (2) linear, (3) sinusoid, and (4) logarithmic. The following figures show the available slopes, arranged according to how the mode change menu displays the selection and then overlaid.
When using the level inputs to pass audio, it's important to note that none of the slopes will perform a standard equal power crossfade during the T stage. However, each imparts a particular quality to the fade.
You can select which envelope segment drives the SEG output with the matching sensor. The options are shown against the generalized ATSR diagram.
The A CV can control either the attack time or the overall envelope time. When (1) attack time is selected, the CV behaves like the other two slope time CVs. With (2) all, the CV is mapped to all three stage times. The other two time CV inputs are unaffected.
With LVL S+H (1) disabled, the level control inputs can move continuously throughout the duration of the slope, effectively passing that signal through to the output. When they are (2) enabled, the A level inputs are sampled as shown in the following figure.
A few specific self patches will create looping behavior. The patch and the result are shown below.